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CompoundTek, a foundry services provider for silicon photonic solutions (SiPh), has announced the tapeout of a reduced footprint grating coupler for photonic I/O. The grating couplers were designed and optimized using the photonic inverse design (PID) in conjunction with Lumerical’s industry-leading FDTD nanophotonic simulator. Lumerical’s PID capability enables photonic designers to rapidly develop entirely new functionality with improved performance, reduced footprint, and more robust manufacturability.
With this successful tapeout in partnership with Lumerical, customers will be able to access Lumerical’s PID solution with confidence when taping-out to CompoundTek in the future. The integration into CompoundTek ‘s design flow, design partners and open SiPh manufacturing platform ecosystem will accelerate the adoption of SiPh solutions for various applications ranging from datacom transceivers, smart sensor, bio-medical, automotive LiDAR, quantum computing, and artificial intelligence.
The SiPh grating coupler is a key functional block for photonic I/O, enabling light to be coupled from fibre into and out of a photonic integrated circuit. Unlike end-fire edge couplers, grating couplers can be located anywhere on chip, enabling additional applications such as sense and test. With this flexibility comes the requirement for reduced footprint while maintaining high coupling efficiency. However, with over 100 design parameters, grating couplers are geometrically complex, rendering traditional optimization techniques impractical. Lumerical’s PID technology enables designers to automatically and reliably generate optimal grating couplers with hundreds of free parameters. Testimony to its effectiveness, CompoundTek’s SiPh new grating couplers have been reduced in size by 20x and promise improved coupling efficiency.
These new grating couplers will enable the customers to create improved commercial designs with higher yields and faster time to market. PID’s powerful optimization algorithms leverage adjoint sensitivity analysis to explore design spaces that are impractical by other means. Coupled with Lumerical’s industry-leading FDTD solver, PID enables designers to efficiently explore and optimize designs with hundreds or more design parameters. In contrast, traditional design approaches are limited to a small number of established device designs, exploring much smaller parameter spaces, typically fewer than ten parameters.
CompoundTek’s SiPh MPW platform offers a highly flexible solution for photonic integrated circuit developers requiring rapid design and manufacture, necessitating multiple variants of the new grating couplers. New capabilities introduced with Lumerical’s 2020 a release allow PID to run efficiently on HPC resources and include job checkpointing support for Amazon Linux, and online self-activation for FDTD Burst Packs. Other notable PID features such as global optimization allow designers to efficiently explore broad design space and co-optimize for process and packaging variation for the creation of robust designs. Rapidly scaling up with Lumerical’s HPC cloud deployment reduced the design cycle for the optimized grating couplers for all eight variants to under two weeks.
The Python-based open-source PID implementation is packaged together with Lumerical FDTD for ease of deployment. Alternatively, the original source code is freely available on GitHub. To help new users get started with PID, examples are included in Lumerical’s application gallery to speed designers’ time to implementation.
Click here to find out more about CompoundTek’s Silicon Photonics platform.