New Silicon Photonics Process Design Kit for Next Generation High-Speed Optical Communications

Posted  by GoPhotonics

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The American Institute for Manufacturing Integrated Photonics (AIM Photonics) and Analog Photonics (AP) have jointly released the AP SUNY Process Design Kit v2.0a (APSUNY_PDKv2.0a). With this release, Analog Photonics has expanded the comprehensive set of Silicon Photonics Integrated Circuit (PIC) component libraries within SUNY Poly’s process to address the high-speed optical communication needs. Combined with Multi-Project Wafer (MPW) runs, this PDK will give AIM Photonics’ members access to world-class silicon photonics components for the development of 100G, 200G and 400G+ optical transceivers or systems used in data centers, metro and long haul optical networks.

According to AIM CEO and SUNY Poly Vice President for Research Dr. Michael Liehr, AIM Photonics is laying a strong foundation for enabling next-generation photonics-based capabilities, and they anticipate that this latest PDK version will provide even further incentive for members of the photonics industry to collaborate with AIM Photonics to leverage the updated PDK, especially for high-speed communications technologies, and join the more than 80 signed members and additional interested collaborators from across the United States, including industrial, academic, and governmental members who have found incredible value in this growing national initiative.

The PDK includes a Silicon Photonics library of interfaces, passive and active components, schematics and models for the development of optical modules and system.

The Key Features of the APSUNY_PDKv2.0a Include:

  • 50Gbps modulation with less than one volt peak to peak drive. Low voltage drive at high bandwidth is key to enable low power applications and work with CMOS/BiCMOS drivers.
  • Digital detectors with greater than 45 GHz bandwidth and high responsivity, ideal for C-band receivers.
  • Both polarization support for standard and low-cost single mode fibers, eliminating the need for expensive polarization maintaining fibers.
  • Lower loss crossings and propagation with seamless dielectric transitions and <1% mismatch between the outputs of a 3dB splitter, leading to a high common mode rejection ratio (CMRR).
  • Continued multi-vendor Electronics-Photonics-Design-Automation (EPDA) support with integrated EPDA PDK flow for schematic driven layout and system-level simulation.

The combined AP SUNY PDKv2.0a and MPW offering provides unmatched access to PIC systems for companies who desire a reduction in the time to market, product development risk, and investment. By incorporating the design, verification, and process development within the PDK, companies can rapidly modify their designs while reducing the cost per gigabit.

With the recent ratification of the IEEE 802.3bs standards for 200G and 400G and the ever-increasing demand for data, transceiver manufacturers will need to keep up with the data center requirements of lower cost, lower power and smaller size transceivers while data rates continue to increase. To accomplish this, optical integration and silicon photonics is a key technology. In the near future, the PDK will be empowered by laser and CMOS integration with an interposer, a capability that will be made possible at AIM Photonics’ Test, Assembly, and Packaging (TAP) facility, located in Rochester, NY. Additional releases of the AP SUNY Process Design Kit are planned over the next several years with improved statistical models, optical components, and PIC systems.

AIM Photonics is planning to conduct PDK updates in February, June, and October and is ready for three total full-build/passive MPW runs to take place February, May, and September 2018, with an interposer MPW run scheduled for June 2018. To ensure space for all interested parties, AIM Photonics is accepting reservations for these MPW runs.

PDK and MPW fab access is solely available through the AIM Photonics MPW aggregator, MOSIS. Click here to know more.


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